Àû²©¡¤(¼¯ÍÅ)ÓÐÏÞ¹«Ë¾¹ÙÍø

Functional description

The AS7C4098 and AS7C34098 are high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) devices organized as 262,144 words ¡Á 16 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.

Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 5/6/7/8 ns are ideal for high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems.

Features

? AS7C4098 (5V version)

? AS7C34098 (3.3V version)

? Industrial and commercial temperature

? Organization: 262,144 words ¡Á 16 bits

? Center power and ground pins

? High speed

- 10/12/15/20 ns address access time

- 5/6/7/8 ns output enable access time

? Low power consumption: ACTIVE

- 1375 mW (AS7C4098)/max @ 12 ns

- 576 mW (AS7C34098)/max @ 10 ns

? Low power consumption: STANDBY

- 110 mW (AS7C4098)/max CMOS

- 72 mW (AS7C34098)/max CMOS

? Individual byte read/write controls

? Easy memory expansion with CE, OE inputs

? TTL- and CMOS-compatible, three-state I/O

? 44-pin JEDEC standard packages

- 400-mil SOJ

- TSOP 2

? ESD protection ¡Ý 2000 volts

? Latch-up current ¡Ý 100 mA