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GENERAL DESCRIPTION

The Am29LV400 is a 4 Mbit, 3.0 volt-only Flash memory organized as 524,288 bytes or 262,144 words. The device is offered in 48-ball FBGA, 44-pin SO, and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15¨CDQ0; the byte-wide (x8) data appears on DQ7¨CDQ0. This device is designed to be programmed in-system using only a single 3.0 volt VCC supply. No VPP is required for write or erase operations. The device can also be programmed in standard EPROM programmers.

DISTINCTIVE CHARACTERISTICS

¡ö Single power supply operation

¡ª Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications

¡ª Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors

¡ö High performance

¡ª Full voltage range: access times as fast as 100 ns

¡ª Regulated voltage range: access times as fast as 90 ns

¡ö Ultra low power consumption (typical values at 5 MHz)

¡ª 200 nA Automatic Sleep mode current

¡ª 200 nA standby mode current

¡ª 10 mA read current

¡ª 20 mA program/erase current

¡ö Flexible sector architecture

¡ª One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and seven 64 Kbyte sectors (byte mode)

¡ª One 8 Kword, two 4 Kword, one 16 Kword, and seven 32 Kword sectors (word mode)

¡ª Supports full chip erase

¡ª Sector Protection features:

A hardware method of locking a sector to prevent any program or erase operations within that sector

Sectors can be locked via programming equipment

Temporary Sector Unprotect feature allows code changes in previously locked sectors

¡ö Top or bottom boot block configurations available

¡ö Embedded Algorithms

¡ª Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors

¡ª Embedded Program algorithm automatically writes and verifies data at specified addresses

¡ö Typical 1,000,000 write cycles per sector (100,000 cycles minimum guaranteed)

¡ö Package option

¡ª 48-ball FBGA

¡ª 48-pin TSOP

¡ª 44-pin SO

¡ö Compatibility with JEDEC standards

¡ª Pinout and software compatible with singlepower supply Flash

¡ª Superior inadvertent write protection

¡ö Data# Polling and toggle bits

¡ª Provides a software method of detecting program or erase operation completion

¡ö Ready/Busy# pin (RY/BY#)

¡ª Provides a hardware method of detecting program or erase cycle completion

¡ö Erase Suspend/Erase Resume

¡ª Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation

¡ö Hardware reset pin (RESET#)

¡ª Hardware method to reset the device to reading array data