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Introduction
The MC68HC908EY16A is a member of the low-cost, high-performance M68HC08 Family of 8-bit microcontroller units (MCUs). All MCUs in the family use the enhanced M68HC08 central processor unit (CPU08) and are available with a variety of modules, memory sizes and types, and package types.
The information contained in this document pertains to the MC68HC908EY8A with the exceptions noted in Appendix A MC68HC908EY8A.
Features
For convenience, features have been organized to reflect:
? Standard features of the MC68HC908EY16A
? Features of the CPU08
Standard features of the MC68HC908EY16A include:
? High-performance M68HC08 architecture optimized for C-compilers
? Fully upward-compatible object code with M6805, M146805, and M68HC05 Families
? 8-MHz internal bus frequency at 5V
? Internal oscillator requiring no external components:
¨C Software selectable bus frequencies
¨C 25 percent accuracy with a trimming capability of better than 1 percent
¨C Clock monitor
¨C Option to allow use of external clock source or external crystal/ceramic resonator
? 15,872 bytes of on-chip FLASH memory with in-circuit programming
? FLASH program memory security(1)
? 512 bytes of on-chip random-access memory (RAM)
? Low voltage inhibit (LVI) module
? Internal clock generator module (ICG)
? Two 16-bit, 2-channel timer (TIMA and TIMB) interface modules with selectable input capture, output compare, and pulse-width modulation (PWM) capability on each channel
? 8-channel, 10-bit successive approximation analog-to-digital converter (ADC)
? Enhanced serial communications interface module (ESCI) for local interconnect network (LIN) connectivity
? Serial peripheral interface (SPI)
? Timebase Module (TBM)
? 5-bit keyboard wakeup port with software selectable rising or falling edge detect, as well as highor low-level detection
¨C Programmable for rising/falling edge or high/low level detection
? 24 general-purpose input/output (I/O) pins
? External asynchronous interrupt pin with internal pullup (IRQ)
? System protection features:
¨C Optional computer operating properly (COP) reset
¨C Illegal opcode detection with reset
¨C Illegal address detection with reset
? 32-pin quad flat pack (QFP) package
? Low-power design; fully static with stop and wait modes
? Internal pullups on IRQ and RST to reduce customer system cost
? Standard low-power modes of operation:
¨C Wait mode
¨C Stop mode
? Master reset pin (RST) and power-on reset (POR)
? BREAK module (BRK) to allow single breakpoint setting during in-circuit debugging
? Higher current source capability on nine port lines for LED drive (PTA6/SS, PTA5/SPSCK, PTA4/KBD4, PTA3/KBD3/RxD, PTA2/KBD2/TxD, PTA1/KBD1, PTA0/KBD0, PTC1/MOSI, and PTC0/MISO)
Features of the CPU08 include:
? Enhanced HC05 programming model
? Extensive loop control functions
? 16 addressing modes (eight more than the HC05)
? 16-bit index register and stack pointer
? Memory-to-memory data transfers
? Fast 8 x 8 multiply instruction
? Fast 16 x 8 divide instruction
? Binary-coded decimal (BCD) instructions
? Optimization for controller applications
? Third party C language support
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