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I/O Controller Hub 4 (ICH4)

Intel? 82801DB ICH4 Features

¡ö PCI Bus Interface

¡ª Supports PCI Revision 2.2 Specification at 33 MHz

¡ª 133 MB/sec maximum throughput

¡ª Supports up to six master devices on PCI

¡ª One PCI REQ/GNT pair can be given higher arbitration priority (intended for external 1394 host controller)

¡ª Support for 44-bit addressing on PCI using DAC protocol

¡ö Integrated LAN Controller

¡ª WfM 2.0 and IEEE 802.3 compliant

¡ª LAN Connect Interface (LCI)

¡ª 10/100 Mbit/sec ethernet support

¡ö Integrated IDE Controller

¡ª Supports ¡°Native Mode¡± register and interrupts

¡ª Independent timing of up to 4 drives, with separate primary and secondary IDE cable connections

¡ª Ultra ATA/100/66/33, BMIDE and PIO modes

¡ª Tri-state modes to enable swap bay

¡ö USB

¡ª Includes three UHCI host controllers that support six external ports

¡ª New: Includes one EHCI high-speed USB 2.0 Host Controller that supports all six ports

¡ª New: Supports a USB 2.0 high-speed debug port

¡ª Supports wake-up from sleeping states S1¨CS5

¡ª Supports legacy keyboard/mouse software

¡ö AC-Link for Audio and Telephony CODECs

¡ªSupports AC ¡¯97 2.3

¡ª New: Third AC_SDATA_IN line for three codec support

¡ª New: Independent bus master logic for seven channels (PCM In/Out, Mic 1 input, Mic 2 input, modem in/out, S/PDIF out)

¡ª Separate independent PCI functions for audio and modem

¡ª Support for up to six channels of PCM audio output (full AC3 decode)

¡ª Supports wake-up events

¡ö Interrupt Controller

¡ª Support up to eight PCI interrupt pins

¡ª Supports PCI 2.2 message signaled interrupts

¡ª Two cascaded 82C59 with 15 interrupts

¡ª Integrated I/O APIC capability with 24 interrupts

¡ª Supports serial interrupt protocol

¡ª Supports processor system bus interrupt delivery

¡ö New: 1.5 V operation with 3.3 V I/O

¡ª 5 V tolerant buffers on IDE, PCI, USB over current and legacy signals

¡ö Timers Based on 82C54

¡ª System timer, refresh request, speaker tone output

¡ö Power Management Logic

¡ª ACPI 2.0 compliant

¡ª ACPI-defined power states (C1¨CC2, S3¨CS5 )

¡ª Supports Desktop S1 state (like C2 state, only STPCLK# active)

¡ª ACPI power management timer

¡ª PCI PME# support

¡ª SMI# generation

¡ª All registers readable/restorable for proper resume from 0 V suspend states

¡ö External Glue Integration

¡ª Integrated pull-up, pull-down and series termination resistors on IDE, processor interface

¡ª Integrated Pull-down and Series resistors on USB

¡ö Enhanced Hub Interface Buffers Improve Routing flexibility (Not available with all Memory Controller Hubs)

¡ö Firmware Hub (FWH) Interface Supports BIOS memory size up to 8 MB

¡ö Low Pin Count (LPC) Interface

¡ª Supports two Master/DMA devices.

¡ö Enhanced DMA Controller

¡ª Two cascaded 8237 DMA controllers

¡ª PCI DMA: Supports PC/PCI ¡ª Includes two PC/PCI REQ#/GNT# pairs

¡ª Supports LPC DMA

¡ª Supports DMA collection buffer to provide Type-F DMA performance for all DMA channels

¡ö Real-Time Clock

¡ª 256-byte battery-backed CMOS RAM

¡ö System TCO Reduction Circuits

¡ª Timers to generate SMI# and Reset upon detection of system hang

¡ª Timers to detect improper processor reset

¡ª Supports ability to disable external devices

¡ö SMBus

¡ª New: Hardware packet error checking

¡ª New: Supports SMBus 2.0 Specification

¡ª Host interface allows processor to communicate via SMBus

¡ª Slave interface allows an external microcontroller to access system resources

¡ª Compatible with most 2-wire components that are also I2C compatible

¡ö GPIO

¡ª TTL, open-drain, inversion

¡ö Package 31x31 mm 421 BGA