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High-Performance, 16-Bit Digital Signal Controllers

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Note: This data sheet summarizes features of this group of dsPIC30F devices and is not intended to be a complete reference source. For more information on the CPU, peripherals, register descriptions and general device functionality, refer to the ¡°dsPIC30F Family Reference Manual¡±(DS70046). For more information on the device instruction set and programming, refer to the ¡°dsPIC30F/33F Programmers Reference Manual¡± (DS70157).

High-Performance Modified RISC CPU:

? Modified Harvard architecture

? C compiler optimized instruction set architecture with flexible Addressing modes

? 83 base instructions

? 24-bit wide instructions, 16-bit wide data path

? 144 Kbytes on-chip Flash program space (Instruction words)

? 8 Kbytes of on-chip data RAM

? 4 Kbytes of nonvolatile data EEPROM

? Up to 30 MIPS operation:

- DC to 40 MHz external clock input

- 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x)

- 7.37 MHz internal RC with PLL active(4x, 8x, 16x)

? 44 interrupt sources:

- 5 external interrupt sources

- 8 user selectable priority levels for each interrupt source

- 4 processor trap sources

? 16 x 16-bit working register array

DSP Engine Features:

? Dual data fetch

? Accumulator write-back for DSP operations

? Modulo and Bit-Reversed Addressing modes

? Two, 40-bit wide accumulators with optional saturation logic

? 17-bit x 17-bit single-cycle hardware fractional/integer multiplier

? All DSP instructions single cycle

? ¡À16-bit single-cycle shift

Peripheral Features:

? High-current sink/source I/O pins: 25 mA/25 mA

?Timer module with programmable prescaler:

- Five 16-bit timers/counters; optionally pair 16-bit timers into 32-bit timer modules

? 16-bit Capture input functions

? 16-bit Compare/PWM output functions

?3-wire SPI modules (supports 4 Frame modes)

?I2CTM module supports Multi-Master/Slave mode and 7-bit/10-bit addressing

? 2 UART modules with FIFO Buffers

? 2 CAN modules, 2.0B compliant (dsPIC306010A)

? 1 CAN module, 2.0B compliant (dsPIC306015)

Motor Control PWM Module Features:

? 8 PWM output channels:

- Complementary or Independent Output modes

- Edge and Center-Aligned modes

? 4 duty cycle generators

? Dedicated time base

? Programmable output polarity

? Dead-Time control for Complementary mode

? Manual output control

? Trigger for A/D conversions

Quadrature Encoder Interface Module Features:

? Phase A, Phase B and Index Pulse input

? 16-bit up/down position counter

? Count direction status

? Position Measurement (x2 and x4) mode

? Programmable digital noise filters on inputs

? Alternate 16-bit Timer/Counter mode

? Interrupt on position counter rollover/underflow

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DSPIC30F2010AT-30E/SO-ES ²úÆ·Ïà¹ØÐͺÅ

  • 110E0A56F206PP
  • 845-028-560-202
  • AME1117ACBT
  • AME1117BCBT
  • AME1117DCBT
  • BA904012003AC660V60HZ
  • DDH-CRS-P2
  • DDW-DJD-W2
  • DM3W-DJD-X2
  • DMRTB-UJB-T3U3S3
  • DMRTB-UJB-T3V3R3
  • DS1646P
  • DSPIC30F5011AT-20I/W-ES
  • DSPIC30F5013AT-30E/S-ES
  • DSPIC30F6010AT-20I/S
  • DSPIC30F6012AT-20E/PF-ES
  • EPC1104P
  • M38032F5L-XXXKP
  • M38039M5L-XXXKP
  • PIC12F615T-E/MDQTP
  • PIC12HV615T-E/MDQTP
  • PIC16F506-I/STQTP
  • PIC16F506T-E/STQTP
  • PIC16F631T-I/SOQTP
  • PIC16F677-E/PQTP
  • PIC16F687-E/PQTP
  • PIC16F886-E/PQTP
  • PIC16F916-I/PTQTP
  • PIC18F24K20-E/SOQTP
  • SMR-CLD-Q1

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