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DEVICE OVERVIEW
This document contains device-specific information for PIC32MX1XX/2XX/5XX 64/100-pin devices.
Operating Conditions
? 2.3V to 3.6V, -40?C to +105?C (DC to 40 MHz),?
-40?C to +85?C (DC to 50 MHz)
Core: 50 MHz/83 DMIPS MIPS32? M4K?
? MIPS16e? mode for up to 40 smaller code size
? Code-efficient (C and Assembly) architecture
? Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Clock Management
? 0.9 internal oscillator
? Programmable PLLs and oscillator clock sources
? Fail-Safe Clock Monitor (FSCM)
? Independent Watchdog Timer
? Fast wake-up and start-up
Power Management
? Low-power management modes (Sleep and Idle)
? Integrated Power-on Reset, Brown-out Reset, and High
Voltage Detect
? 0.5 mA/MHz dynamic current (typical)
? 44 ¦ÌA IPD current (typical)
Audio/Graphics/Touch HMI Features
? External graphics interface with up to 34 PMP pins
? Audio data communication: I2S, LJ, RJ, USB
? Audio data control interface: SPI and I2C
? Audio data master clock:
- Generation of fractional clock frequencies
- Can be synchronized with USB clock
- Can be tuned in run-time
? Charge Time Measurement Unit (CTMU):
- Supports mTouch? capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
Advanced Analog Features
? ADC Module:
- 10-bit 1 Msps rate with one Sample and Hold (S&H)
- Up to 48 analog inputs
- Can operate during Sleep mode
? Flexible and independent ADC trigger sources
? On-chip temperature measurement capability
? Comparators:
- Three dual-input Comparator modules
- Programmable reference with 32 voltage points
Timers/Output Compare/Input Capture
? Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
? Five Output Compare (OC) modules
? Five Input Capture (IC) modules
? Peripheral Pin Select (PPS) to allow function remap
? Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
? USB 2.0-compliant Full-speed OTG controller
? Up to five UART modules (12.5 Mbps):
- LIN 1.2 protocols and IrDA? support
? Four 4-wire SPI modules (25 Mbps)
? Two I2C modules (up to 1 Mbaud) with SMBus support
? PPS to allow function remap
? Parallel Master Port (PMP) with dual read/write buffers
? Controller Area Network (CAN) 2.0B Compliant with DeviceNet? addressing support
Direct Memory Access (DMA)
? Four channels of hardware DMA with automatic data size detection
? 32-bit Programmable Cyclic Redundancy Check (CRC)
? Two additional channels dedicated to USB
? Two additional channels dedicated to CAN
Input/Output
? 10 mA or 15 mA source/sink for standard VOH/VOL and up to 22 mA for non-standard VOH1
? 5V-tolerant pins
? Selectable open drain, pull-ups, and pull-downs
? External interrupts on all I/O pins
Qualification and Class B Support
? AEC-Q100 REVG (Grade 2 -40?C to +105?C)
? Class B Safety Library, IEC 60730
Debugger Development Support
? In-circuit and in-application programming
? 4-wire MIPS? Enhanced JTAG interface
? Unlimited program and six complex data breakpoints
? IEEE 1149.2-compatible (JTAG) boundary scan
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24+ |
100-TFBGA |
25000 |
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MICROCHIP(ÃÀ¹ú΢о) |
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TQFP-100_12x12x04P |
541200 |
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PIC32MX570F512LT-50I/PF |
MICROCHIP(ÃÀ¹ú΢о) |
23+ |
TQFP-100(14x14) |
1612 |
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2017-MI |
21500 |
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PIC32MX570F512L-V/PT |
MICROCHIP |
22+23+ |
TQFP100 |
30307 |
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PIC32MX570F512L-V/PT |
Microchip |
24+ |
100QFN |
10000 |
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PIC32MX570F512L ²úÆ·Ïà¹ØÐͺÅ
- 0250020807_17
- 614NGH
- 890493426011CS
- C0402CHMC0GMJB1V107J020AA
- C0402X7R0J107J020AA
- C1005X6S1V107K020AA
- C1608CHMC0GMJB1V107J020AA
- C1608X5R0G107J020AA
- C1608X7R1E107K020AA
- C2012X6S1A107J020AA
- C3216X5R1H107K020AA
- C5750X6S1A107J020AA
- EEE-EB0G680
- EEE-EB0G6R8
- EEE-EB0G820
- GWJTLPS1.EM-JMKK-A838-1
- GWJTLRS1.EM-K2K5-A131-1
- GWJTLRS1.EM-K3LV-XX52-1
- GWKAFJB3.CM-RRRS-30S3
- GWP9LR31.PM-PRPS-XX57-1
- GWP9LT32.CM
- GWSBLMA2.EM-HPHR-A535-1
- GWSBLMA2.EM-HPHR-A737-1
- IIRFR8314
- IRFR8314
- PE3C0144-48
- PE3C0673-48
- PE6202_16
- SN74AXC1T45DRLR
- SSI-LXR4815YD-150
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