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Introduction

The MC68HC912DT128A microcontroller unit (MCU) is a 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (CPU12), 128K bytes of flash EEPROM, 8K bytes of RAM, 2K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), a serial peripheral interface (SPI), an inter-IC interface(I2C), an enhanced capture timer (ECT), two 8-channel, 10-bit analogto-digital converters (ADC), a four-channel pulse-width modulator (PWM), and three CAN 2.0 A, B software compatible modules (MSCAN12).

Features

? 16-bit CPU12

¨C Upward compatible with M68HC11 instruction set

¨C Interrupt stacking and programmer¡¯s model identical to M68HC11

¨C 20-bit ALU

¨C Instruction queue

¨C Enhanced indexed addressing

? Multiplexed bus

¨C Single chip or expanded

¨C 16 address/16 data wide or 16 address/8 data narrow modes

?Memory

¨C 128K byte flash EEPROM, made of four 32K byte modules with 8K bytes protected BOOT section in each module

¨C 2K byte EEPROM

¨C 8K byte RAM with Vstby, made of two 4K byte modules.

? Two Analog-to-digital converters

¨C 2 times 8-channels, 10-bit resolution

? Three 1M bit per second, CAN 2.0 A, B software compatible

modules on the MC68HC912DT128A (two on the MC68HC912DG128A)

¨C Two receive and three transmit buffers per CAN

¨C Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8x8bit

¨C Four separate interrupt channelsfor Rx, Tx, error and wake-up per CAN

¨C Low-pass filter wake-up function

¨C Loop-back for selftest operation

¨C Programmable link to a timer input capture channel, for timestamping and network synchronization.

? Enhanced capture timer (ECT)

¨C 16-bit main counter with 7-bit prescaler

¨C 8 programmable input capture or output compare channels; 4 of the 8 input captures with buffer

¨C Input capture filters and buffers, three successive captures on four channels, or two captures on four channels with a capture/compare selectable on the remaining four

¨C Four 8-bit or two 16-bit pulse accumulators

¨C 16-bit modulus down-counterwith 4-bit prescaler

¨C Four user-selectable delay counters for signal filtering

? 112-Pin TQFP package

¨C Up to 67 general-purpose I/O lines on the MC68HC912DT128A (up to 69 on the MC68HC912DG128A),

plus up to 18 input-only lines

¨C 5.0V operation at 8 MHz

? Development support

¨C Single-wire background debug? mode (BDM)

¨C On-chip hardware breakpoints