利博·(集团)有限公司官网

FEATURES:

? Phase-Lock Loop Clock Distribution

? 10MHz to 133MHz operating frequency

? Distributes one clock input to one bank of five outputs

? Zero Input-Output Delay

? Output Skew < 250ps

? Low jitter <200 ps cycle-to-cycle

? IDT23S05-1 for Standard Drive

? IDT23S05-1H for High Drive

? No external RC network required

? Operates at 3.3V VDD

? Power down mode

? Spread spectrum compatible

? Available in SOIC package