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Summary description

The NAND256-M, NAND512-M and NAND01G-M are Multi-Chip Packages which combine up to 512 Mbit LPSDRAM with a 256 Mbit, 512 Mbit or 1 Gbit NAND Flash memory. This combination of LPSDRAM and NAND Flash can result in up to 1 Gbit of memory.

Features

¡ö Multi-Chip Packages

¨C 1 die of 256 Mb, 512 Mb (x8/ x16) NAND Flash + 1 die of 256 Mb (x16) SDR LPSDRAM

¨C 1 die of 256 Mb, 512 Mb (x8/ x16) NAND Flash + 2 dice of 256 Mb (x16) SDR LPSDRAMs

¨C 1 die of 256 Mb, 512 Mb (x8/ x16) NAND Flash +1 die of 256 Mb (x16) DDR LPSDRAM

¨C 1 die of 512 Mb (x16) NAND Flash + 1 die of 256 Mb or 512 Mb (x16) DDR LPSDRAM

¡ö Supply voltages

¨C VDDF = 1.7V to 1.95V or 2.5V to 3.6V

¨C VDDD = VDDQD = 1.7V to 1.9V

¡ö Electronic Signature

¡ö ECOPACK? packages

¡ö Temperature range

¨C -30 to 85¡ãC

Flash Memory

¡ö NAND Interface

¨C x8 or x16 bus width

¨C Multiplexed Address/ Data

¡ö Page size

¨C x8 device: (512 + 16 spare) Bytes

¨C x16 device: (256 + 8 spare) Words

¡ö Block size

¨C x8 device: (16K + 512 spare) Bytes

¨C x16 device: (8K + 256 spare) Words

¡ö Page Read/Program

¨C Random access: 15?s (max)

¨C Sequential access: 50ns (min)

¨C Page program time: 200?s (typ)

¡ö Copy Back Program mode

¨C Fast page copy without external buffering

¡ö Fast Block Erase

¨C Block erase time: 2ms (typ)

¡ö Status Register

¡ö Data integrity

¨C 100,000 Program/Erase cycles

¨C 10 years Data Retention

LPSDRAM

¡ö Interface: x16 or x 32 bus width

¡ö Deep Power Down mode

¡ö 1.8v LVCMOS interface

¡ö Quad internal Banks controlled by BA0 and BA1

¡ö Automatic and controlled Precharge

¡ö Auto Refresh and Self Refresh

¨C 8,192 Refresh cycles/64ms

¨C Programmable Partial Array Self Refresh

¨C Auto Temperature Compensated Self Refresh

¡ö Wrap sequence: sequential/interleave

¡ö Burst Termination by Burst Stop command and Precharge command