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Description

The STM32F101x4 and STM32F101x6 Low-density access line family incorporates the high-performance ARM Cortex?-M3 32-bit RISC core operating at a 36 MHz frequency, high-speed embedded memories (Flash memory of 16 to 32 Kbytes and SRAM of 4 to 6 Kbytes), and an extensive range of enhanced peripherals and I/Os connected to two APB buses. All devices offer standard communication interfaces (one I2C, one SPI, and two USARTs), one 12-bit ADC and up to two general-purpose 16-bit timers.

Features

¡ö Core: ARM 32-bit Cortex?-M3CPU

¨C 36 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access

¨C Single-cycle multiplication and hardware division

¡ö Memories

¨C 16 to 32 Kbytes of Flash memory

¨C 4 to 6 Kbytes of SRAM

¡ö Clock, reset and supply management

¨C 2.0 to 3.6 V application supply and I/Os

¨C POR, PDR and programmable voltage detector (PVD)

¨C 4-to-16 MHz crystal oscillator

¨C Internal 8 MHz factory-trimmed RC

¨C Internal 40 kHz RC

¨C PLL for CPU clock

¨C 32 kHz oscillator for RTC with calibration

¡ö Low power

¨C Sleep, Stop and Standby modes

¨CVBATsupply for RTC and backup registers

¡ö Debug mode

¨C Serial wire debug (SWD) and JTAG interfaces

¡ö DMA

¨C 7-channel DMA controller

¨C Peripherals supported: timers, ADC, SPIs, I2Cs and USARTs

¡ö 1 ¡Á 12-bit, 1 ?s A/D converter (up to 16 channels)

¨C Conversion range: 0 to 3.6 V

¨C Temperature sensor

¡ö Up to 51 fast I/O ports

¨C 26/37/51 I/Os, all mappable on 16 external interrupt vectors and almost all 5 V-tolerant

¡ö Up to 5 timers

¨C Up to two16-bit timers, each with up to 4 IC/OC/PWM or pulse counter

¨C 2 watchdog timers (Independent and Window)

¨C SysTick timer: 24-bit downcounter

¡ö Up to 4 communication interfaces

¨C 1 x I2C interface (SMBus/PMBus)

¨C Up to 2 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)

¨C 1 ¡Á SPI (18 Mbit/s)

¡ö CRC calculation unit, 96-bit unique ID

¡ö ECOPACK? packages