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Features

The i.MX RT1015 processors are based on Arm Cortex-M7 Core? Platform, which has the following

features:

? Supports single Arm Cortex-M7 with:

¡ª 16 KB L1 Instruction Cache

¡ª 16 KB L1 Data Cache

¡ª Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture

¡ª Support the Armv7-M Thumb instruction set

? Integrated MPU, up to 16 individual protection regions

? Up to 128 KB I-TCM and D-TCM in total

? Frequency of 500 MHz

? Cortex M7 CoreSight? components integration for debug

? Frequency of the core, as per Table 9, Operating ranges, on page 17.

The SoC-level memory system consists of the following additional components:

¡ª Boot ROM (96 KB)

¡ª On-chip RAM (128 KB)

¨C Configurable RAM size up to 128 KB shared with CM7 TCM

? External memory interfaces:

¡ª SPI NOR/NAND FLASH

¡ª Parallel NOR FLASH with XIP support

¡ª Single/Dual channel Quad SPI FLASH with XIP support

? Timers and PWMs:

¡ª Two General Programmable Timers

¨C 4-channel generic 32-bit resolution timer

¨C Each support standard capture and compare operation

¡ª Four Periodical Interrupt Timers

¨C Generic 32-bit resolution timer

¨C Periodical interrupt generation

¡ª One Quad Timer

¨C 4-channel generic 16-bit resolution timer

¨C Each support standard capture and compare operation

¨C Quadrature decoder integrated

¡ª One FlexPWM

¨C Up to 8 individual PWM channels

¨C 16-bit resolution PWM suitable for Motor Control applications

¡ª One Quadrature Encoder/Decoder

Each i.MX RT1015 processor enables the following interfaces to external devices (some of them are

multiplexed and not available simultaneously):

? Audio:

¡ª S/PDIF input and output

¡ª Three synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and

codec/DSP interfaces

¡ª MQS interface for medium quality audio via GPIO pads

? Connectivity:

¡ª One USB 2.0 OTG controller with integrated PHY interface

¡ª Four universal asynchronous receiver/transmitter (UARTs) modules

¡ª Two I2C modules

¡ª Two SPI modules

? GPIO and Pin Multiplexing:

¡ª General-purpose input/output (GPIO) modules with interrupt capability

¡ª Input/output multiplexing controller (IOMUXC) to provide centralized pad control

¡ª 57 GPIOs

¡ª One FlexIO

The i.MX RT1015 processors integrate advanced power management unit and controllers:

? Full PMIC integration, including on-chip DCDC and LDOs

? Temperature sensor with programmable trip points

? GPC hardware power management controller

The i.MX RT1015 processors support the following system debug:

? Arm CortexM7 CoreSight debug and trace architecture

? Trace Port Interface Unit (TPIU) to support off-chip real-time trace

? Support for 5-pin (JTAG) and SWD debug interfaces selected by eFuse

Security functions are enabled and accelerated by the following hardware:

? High Assurance Boot (HAB)

? Data Co-Processor (DCP):

¡ª AES-128, ECB, and CBC mode

¡ª SHA-1 and SHA-256

¡ª CRC-32

? Bus Encryption Engine (BEE)

¡ª AES-128, ECB, and CTR mode

¡ª On-the-fly QSPI Flash decryption

? True random number generation (TRNG)

? Secure Non-Volatile Storage (SNVS)

¡ª Secure real-time clock (RTC)

¡ª Zero Master Key (ZMK)

? Secure JTAG Controller (SJC)